PDLE-101 PDL Emulator
Product information "PDLE-101 PDL Emulator"
PDL Dynamic Range 0.1-20 dB; PDL Resolution 0.1 dB; C-, L-Band; Max. IL 2 dB; PDL Switching Time ≤5 ms; Residual PDM <0.1 ps; RL >50 dB
High-speed fiber optic transceivers, including those deploying coherent detection technology for 40 Gbit/s and 100 Gbit/s data transmission, must meet stringent PDL (polarization dependent loss) tolerance specifications. In addition, the PDL tracking speed and response time of the PDL mitigation algorithm of a coherent detection receiver must be quantified.
General Photonics’ PDLE-101 PDL emulator is specially designed for such PDL-related tests. This PDL source/ emulator can generate individual PDL values between 0 and 20 dB, with a resolution of 0.1 dB for PDL tolerance testing. It can also generate variable PDL with user defined range, waveform, and speed for PDL tracking speed and recovery time tests.
The PDLE-101 PDL emulator can be controlled via the front panel keypad or by remote control via USB, RS-232, GPIB, or Ethernet interfaces. The residual PMD of the unit is less than 0.1 ps.
Key Features:
- High PDL (Polarization Dependent Loss) Resolution: 0.1 dB
- Wide PDL Dynamic Range: 0.1 to 20 dB
- High Speed, PDL Switching Time: 5 ms max., 1 ms typ.
- PDL Waveforms: Sine, Square, Triangle
- Random PDL Generation
- Wavelength Range: C-Band or L-Band
- Max. Insertion Loss (IL): 2 dB @ PDL = 0, Excluding Connectors
- Low Residual PMD: <0.1 ps @ PDL = 0
- Return Loss: >50 dB
- Fiber Type: SMF-28
- Fiber Connector Type: FC/PC, FC/APC, SC/PC, SC/APC
- Optical Power Handling: 500 mW
Applications: PDL Tolerance Test; PDL Tracking Speed and Recovery Time Tests; PDL Emulation; Code Development for PDL Compensation in Coherent Systems; System PDL Response Test